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projects:fpga_note_generator [2013/12/22 23:19]
criley1
projects:fpga_note_generator [2013/12/30 18:27] (current)
criley1
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 +======FPGA Note Generator======
 +by Caitlin Riley
 +
 =====What I Did===== =====What I Did=====
  
-{{projects:​p1020661.jpg?​550}}+{{projects:​p1020661.jpg?​550|Note Generator}}
  
 I turned my FPGA into an instrument capable of playing eight notes. The eight switches on the FPGA are set to correspond to a note in an A natural minor scale. When a switch is on, the FPGA outputs an 8-bit quantized sine wave corresponding to that note. The sine wave is then converted into an analog signal that drives a speaker. A video of it working can be downloaded [[fpga_note_generator#​files|below]]. I turned my FPGA into an instrument capable of playing eight notes. The eight switches on the FPGA are set to correspond to a note in an A natural minor scale. When a switch is on, the FPGA outputs an 8-bit quantized sine wave corresponding to that note. The sine wave is then converted into an analog signal that drives a speaker. A video of it working can be downloaded [[fpga_note_generator#​files|below]].
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 ====Digital-to-Analog Converter==== ====Digital-to-Analog Converter====
  
-{{projects:​p1020662.jpg?​350}}+{{projects:​p1020662.jpg?​350|R-2R Ladder}}
  
 I ended up using an R-2R resistor ladder as the DAC for my system. Using an R-2R resistor ladder is a simple way to convert from digital to analog. It works by weighting the contribution of each bit to the final output voltage. The most significant bit contributes the most to the output voltage and the least significant bit contributes the least. An op amp buffer was placed between the resistor ladder and the speaker to prevent the speaker from acting as another resistor and distorting the output of the DAC. Although an R-2R ladder is not as accurate as other methods of digital to analog conversion, it was good enough for my purposes. I ended up using an R-2R resistor ladder as the DAC for my system. Using an R-2R resistor ladder is a simple way to convert from digital to analog. It works by weighting the contribution of each bit to the final output voltage. The most significant bit contributes the most to the output voltage and the least significant bit contributes the least. An op amp buffer was placed between the resistor ladder and the speaker to prevent the speaker from acting as another resistor and distorting the output of the DAC. Although an R-2R ladder is not as accurate as other methods of digital to analog conversion, it was good enough for my purposes.
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 </​file>​ </​file>​
  
-The phase accumulator and sine LUT were included in one module generated by the Xilinx CORE generator. I choose ​to the output of the sine LUT to be 8-bits because I initially planned on using an 8-bit DAC IC. This was called and then the output to the DAC was assigned using a ternary operator that only supplied an output sine wave if a switch was set high, as shown below.+The phase accumulator and sine LUT were included in one module generated by the Xilinx CORE generator. I chose to have the phase increment value be 26 bits so that the DDS had a frequency resolution of .745. I chose the output of the sine LUT to be 8-bits because I initially planned on using an 8-bit DAC IC. The DDS module ​was called and then the output to the DAC was assigned using a ternary operator that only supplied an output sine wave if a switch was set high, as shown below.
  
 <file verilog> <file verilog>
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 Because the switches on the FPGA board are connected to the same FPGA pins as the 16-pin header connector, I used two sets of the 6-pin header connectors to connect the 8-bit sine wave output to the DAC. I powered the op amp from the ground and V<​sub>​DD</​sub>​ pins on the first header connector. The diagram for the DAC and speaker connection can be seen below. Because the switches on the FPGA board are connected to the same FPGA pins as the 16-pin header connector, I used two sets of the 6-pin header connectors to connect the 8-bit sine wave output to the DAC. I powered the op amp from the ground and V<​sub>​DD</​sub>​ pins on the first header connector. The diagram for the DAC and speaker connection can be seen below.
  
-{{projects:​Schematic.png}}+{{projects:​Schematic.png|Circuit diagram}}
  
 ====Gotchas==== ====Gotchas====
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 =====Files===== =====Files=====
-{{projects:​note_generator_demo_video.zip}}:​ Video demonstrating the FPGA outputting an A minor scale.+{{projects:​note_generator_demo_video.zip}}:​ Video demonstrating the FPGA outputting an A natural ​minor scale.
  
 {{projects:​notegeneratorproject.zip}}:​ Contains all of the project files. {{projects:​notegeneratorproject.zip}}:​ Contains all of the project files.
projects/fpga_note_generator.1387772345.txt.gz ยท Last modified: 2013/12/22 23:19 by criley1