Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan3
OS Platform: NT64 Target Device: xc3s1000
Project ID (random number) 9420f6f36f0143a08d15315a9cec1ff2.ADF88CDC5B7F43C484AB6833F26FD38B.8 Target Package: ft256
Registration ID 210945993_0_0_712 Target Speed: -5
Date Generated 2014-12-17T15:55:41 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-3540M CPU @ 3.00GHz CPU Speed 2990 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Comparators=20
  • 10-bit comparator greatequal=8
  • 10-bit comparator less=12
Counters=2
  • 10-bit up counter=2
Registers=1
  • Flip-Flops=1
MiscellaneousStatistics
  • AGG_BONDED_IO=6
  • AGG_IO=6
  • AGG_SLICE=29
  • NUM_4_INPUT_LUT=54
  • NUM_BONDED_IOB=6
  • NUM_BUFGMUX=2
  • NUM_CYMUX=18
  • NUM_LUT_RT=18
  • NUM_SLICEL=29
  • NUM_SLICE_FF=21
  • NUM_XOR=20
NetStatistics
  • NumNets_Active=67
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=11
  • NumNodesOfType_Active_CNTRLPIN=16
  • NumNodesOfType_Active_DOUBLE=49
  • NumNodesOfType_Active_DUMMY=135
  • NumNodesOfType_Active_DUMMYESC=1
  • NumNodesOfType_Active_GLOBAL=11
  • NumNodesOfType_Active_HUNIHEX=4
  • NumNodesOfType_Active_INPUT=152
  • NumNodesOfType_Active_IOBOUTPUT=1
  • NumNodesOfType_Active_OMUX=63
  • NumNodesOfType_Active_OUTPUT=60
  • NumNodesOfType_Active_PREBXBY=30
  • NumNodesOfType_Active_VFULLHEX=5
  • NumNodesOfType_Gnd_DOUBLE=1
  • NumNodesOfType_Gnd_INPUT=2
  • NumNodesOfType_Gnd_OMUX=1
  • NumNodesOfType_Gnd_OUTPUT=1
  • NumNodesOfType_Gnd_PREBXBY=2
SiteStatistics
  • IOB-DIFFM=3
  • IOB-DIFFS=2
  • SLICEL-SLICEM=16
SiteSummary
  • BUFGMUX=2
  • BUFGMUX_GCLKMUX=2
  • BUFGMUX_GCLK_BUFFER=2
  • IOB=6
  • IOB_INBUF=1
  • IOB_OUTBUF=5
  • IOB_PAD=6
  • SLICEL=29
  • SLICEL_C1VDD=2
  • SLICEL_CYMUXF=10
  • SLICEL_CYMUXG=8
  • SLICEL_F=28
  • SLICEL_F5MUX=5
  • SLICEL_FFX=10
  • SLICEL_FFY=11
  • SLICEL_G=26
  • SLICEL_GNDF=8
  • SLICEL_GNDG=8
  • SLICEL_XORF=10
  • SLICEL_XORG=10
 
Configuration Data
BUFGMUX
  • S=[S_INV:2] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:2]
  • S=[S_INV:2] [S:0]
IOB
  • O1=[O1_INV:0] [O1:5]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:5]
IOB_PAD
  • DRIVEATTRBOX=[12:5]
  • IOATTRBOX=[LVCMOS25:6]
  • SLEW=[SLOW:5]
SLICEL
  • BX=[BX_INV:0] [BX:7]
  • BY=[BY:1] [BY_INV:0]
  • CE=[CE:5] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:8]
  • CLK=[CLK:11] [CLK_INV:0]
  • SR=[SR:11] [SR_INV:0]
SLICEL_CYMUXF
  • 0=[0:10] [0_INV:0]
  • 1=[1_INV:0] [1:10]
SLICEL_CYMUXG
  • 0=[0:8] [0_INV:0]
SLICEL_F5MUX
  • S0=[S0:5] [S0_INV:0]
SLICEL_FFX
  • CE=[CE:5] [CE_INV:0]
  • CK=[CK:10] [CK_INV:0]
  • D=[D:10] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:10]
  • FFX_SR_ATTR=[SRLOW:10]
  • LATCH_OR_FF=[FF:10]
  • SR=[SR:10] [SR_INV:0]
  • SYNC_ATTR=[SYNC:10]
SLICEL_FFY
  • CE=[CE:5] [CE_INV:0]
  • CK=[CK:11] [CK_INV:0]
  • D=[D:11] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:11]
  • FFY_SR_ATTR=[SRLOW:11]
  • LATCH_OR_FF=[FF:11]
  • SR=[SR:11] [SR_INV:0]
  • SYNC_ATTR=[SYNC:11]
SLICEL_XORF
  • 1=[1_INV:0] [1:10]
 
Pin Data
BUFGMUX
  • I0=2
  • O=2
  • S=2
BUFGMUX_GCLKMUX
  • I0=2
  • OUT=2
  • S=2
BUFGMUX_GCLK_BUFFER
  • IN=2
  • OUT=2
IOB
  • I=1
  • O1=5
  • PAD=6
IOB_INBUF
  • IN=1
  • OUT=1
IOB_OUTBUF
  • IN=5
  • OUT=5
IOB_PAD
  • PAD=6
SLICEL
  • BX=7
  • BY=1
  • CE=5
  • CIN=8
  • CLK=11
  • COUT=8
  • F1=27
  • F2=17
  • F3=16
  • F4=14
  • G1=24
  • G2=14
  • G3=12
  • G4=8
  • SR=11
  • X=18
  • XQ=10
  • Y=11
  • YQ=11
SLICEL_C1VDD
  • 1=2
SLICEL_CYMUXF
  • 0=10
  • 1=10
  • OUT=10
  • S0=10
SLICEL_CYMUXG
  • 0=8
  • 1=8
  • OUT=8
  • S0=8
SLICEL_F
  • A1=27
  • A2=17
  • A3=16
  • A4=14
  • D=28
SLICEL_F5MUX
  • F=5
  • G=5
  • OUT=5
  • S0=5
SLICEL_FFX
  • CE=5
  • CK=10
  • D=10
  • Q=10
  • SR=10
SLICEL_FFY
  • CE=5
  • CK=11
  • D=11
  • Q=11
  • SR=11
SLICEL_G
  • A1=24
  • A2=14
  • A3=12
  • A4=8
  • D=26
SLICEL_GNDF
  • 0=8
SLICEL_GNDG
  • 0=8
SLICEL_XORF
  • 0=10
  • 1=10
  • O=10
SLICEL_XORG
  • 0=10
  • 1=10
  • O=10
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1000-ft256-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1000-ft256-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 38 25 0 0 0 0 0
bitgen 29 29 0 0 0 0 0
map 35 33 0 0 0 0 0
ngdbuild 37 37 0 0 0 0 0
par 33 31 2 0 0 0 0
trce 31 31 0 0 0 0 0
xst 98 96 0 0 0 0 0
 
Project Statistics
PROPEXT_xilxSynthMaxFanout_virtex2=100000 PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values PROP_Simulator=Modelsim-SE Verilog
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2014-12-16T19:23:45 PROP_intWbtProjectID=ADF88CDC5B7F43C484AB6833F26FD38B
PROP_intWbtProjectIteration=8 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan3
PROP_DevDevice=xc3s1000 PROP_DevFamilyPMName=spartan3
PROP_DevPackage=ft256 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-5 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=2
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDR=11 NGDBUILD_NUM_FDRE=10
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_INV=2 NGDBUILD_NUM_LUT1=18 NGDBUILD_NUM_LUT2=2
NGDBUILD_NUM_LUT2_D=1 NGDBUILD_NUM_LUT3=6 NGDBUILD_NUM_LUT4=21 NGDBUILD_NUM_LUT4_L=1
NGDBUILD_NUM_MUXCY=18 NGDBUILD_NUM_MUXF5=5 NGDBUILD_NUM_OBUF=5 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=20
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_FDR=11 NGDBUILD_NUM_FDRE=10 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=2 NGDBUILD_NUM_LUT1=18 NGDBUILD_NUM_LUT2=2
NGDBUILD_NUM_LUT2_D=1 NGDBUILD_NUM_LUT3=6 NGDBUILD_NUM_LUT4=21 NGDBUILD_NUM_LUT4_L=1
NGDBUILD_NUM_MUXCY=18 NGDBUILD_NUM_MUXF5=5 NGDBUILD_NUM_OBUF=5 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=20
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s1000-5-ft256 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=100000 -bufg=8
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5