dds_compiler_v4_0 Project Status (12/16/2013 - 01:46:53)
Project File:	TestDDS.xise	Parser Errors:	No Errors
Module Name:	dds_compiler_v4_0	Implementation State:	Synthesized
Target Device:	xc3s1000-5fg320	Errors:
Product Version:	ISE 14.7	Warnings:
Design Goal:	Balanced	Routing Results:
Design Strategy:	Xilinx Default (unlocked)	Timing Constraints:
Environment:		Final Timing Score:

 

Detailed Reports						[-]
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report
Translation Report
Map Report
Place and Route Report
CPLD Fitter Report (Text)
Power Report
Post-PAR Static Timing Report
Bitgen Report

 

Secondary Reports			[-]
Report Name	Status	Generated
ISIM Simulator Log	Out of Date	Mon Dec 16 01:44:38 2013

Date Generated: 12/16/2013 - 01:46:53