2014:vacuum_tube_sr_latch
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2014:vacuum_tube_sr_latch [2014/12/16 17:57] fbourke |
2014:vacuum_tube_sr_latch [2014/12/18 00:44] fbourke |
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| | {{ 2014:isorender.jpg?840 | Render of our mechanical design}} | | | {{ 2014:isorender.jpg?840 | Render of our mechanical design}} | | ||
| + | ===== Analysis of Our Plan ===== | ||
| + | We stated that building an SR latch was a yellow "intermediate" goal, and we're happy to have accomplished this. We did investigate doing other digital logic with vacuum tubes. We found a source called [[http://www.quadibloc.com/comp/cp01.htm|What Computers are Made From]] that has two schematics: a tube NOR gate shown as two triodes with their plates tied together, and a tube NAND gate that is shown as a pentode with the top and bottom grids attached to the inputs. | ||
| + | |||
| + | TODO: talk about adder (additron tube) | ||
| + | http://www.ludd.luth.se/~ragge/vtc/ | ||
| + | http://www.quadibloc.com/comp/cp01.htm | ||
| + | http://www.google.com/patents/US2784312 | ||
| + | THIS: http://archive.computerhistory.org/resources/text/Knuth_Don_X4100/PDF_index/k-8-pdf/k-8-r5367-1-ENIAC-circuits.pdf | ||
| + | SPICE models from: http://www.duncanamps.com/technical/ltspice.html | ||
| TODO: WORK PLAN (yellow goal!) | TODO: WORK PLAN (yellow goal!) | ||
| TODO: AND? OR? | TODO: AND? OR? | ||
| TODO: Link to ENIAC paper | TODO: Link to ENIAC paper | ||
2014/vacuum_tube_sr_latch.txt ยท Last modified: 2014/12/18 23:43 by fbourke
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