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projects:rfid_exploration [2013/12/19 17:46] jpatterson [RFID Reader] |
projects:rfid_exploration [2013/12/19 17:46] jpatterson [FPGA and Verilog] |
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We tested our code in MATLAB before we implemented it in Verilog. We designed our MATLAB code with Verilog in mind. We designed our MATLAB code so that was a loop and updated the extracted code with each cycle of the code. We also avoided division and multiplication which helped make the transition to Verilog easy. | We tested our code in MATLAB before we implemented it in Verilog. We designed our MATLAB code with Verilog in mind. We designed our MATLAB code so that was a loop and updated the extracted code with each cycle of the code. We also avoided division and multiplication which helped make the transition to Verilog easy. |