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--- projects:fpga_piano [2013/12/19 21:30]
rdedhia [How can someone else build on it?]
+++ projects:fpga_piano [2013/12/19 21:36] (current)
edorsky
@@ Line 62: / Line 62: @@
 === Difficulties ===
-Our main difficulty was in implementing the music code (i.e., the module that played a simple song).  We managed to synthesize the master.v module and its dependent modules in the Xilinx ISE, but whenever we attempted to configure the target device, we got an un-logged error which prevented us from compiling the code onto the FPGA.
+Our main difficulty was in implementing the music code (i.e., the module that played a simple song).  We managed to synthesize the master.v module and its dependent modules in the Xilinx ISE, but whenever we attempted to configure the target device, we got an un-logged error which prevented us from compiling the code onto the FPGA. The problem is likely to lie in the intricacies of FPGA programming best practices, and we didn't have time to debug it.
 === Future Work ===

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