2014:8-bit_minecraft_cpu
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2014:8-bit_minecraft_cpu [2014/12/17 01:09] siddthesquid |
2014:8-bit_minecraft_cpu [2014/12/19 11:47] (current) siddthesquid [Future Work] |
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| Our goals for this project are to: | Our goals for this project are to: | ||
| - | * Design an 8-bit computer architecture with a 512 total bytes of memory (256 bytes of instruction memory + 256 bytes of data memory) and 8 total one-byte registers (4 architecture specific registers and 4 general registers). | + | * Design an 8-bit computer architecture with a 192 total bytes of memory (128 bytes of instruction memory + 64 bytes of data memory) and 8 total one-byte registers (4 architecture specific registers and 4 general registers). |
| * Implement our 8-bit CPU into a Minecraft world using a RedPower modpack which contains basic electrical components (such as logic gates, flip flops and latches, clocks, and multiplexers) | * Implement our 8-bit CPU into a Minecraft world using a RedPower modpack which contains basic electrical components (such as logic gates, flip flops and latches, clocks, and multiplexers) | ||
| * Execute programs through our CPU by loading the instruction memory and checking the outputs of the registers or data memory | * Execute programs through our CPU by loading the instruction memory and checking the outputs of the registers or data memory | ||
| Line 27: | Line 27: | ||
| * 8-bit CPU. This means that each of our registers, memory space, and instructions will be 8 bits long. | * 8-bit CPU. This means that each of our registers, memory space, and instructions will be 8 bits long. | ||
| * Single-cycle CPU. Each instruction takes exactly one cycle to be completed. | * Single-cycle CPU. Each instruction takes exactly one cycle to be completed. | ||
| - | * 256-byte data memory | + | * 64-byte data memory |
| - | * 256-byte instruction memory | + | * 128-byte instruction memory |
| * 8 registers (each are 1 byte big) | * 8 registers (each are 1 byte big) | ||
| * 1 byte Program Counter | * 1 byte Program Counter | ||
| Line 37: | Line 37: | ||
| ---- | ---- | ||
| Register: $ACC\\ | Register: $ACC\\ | ||
| - | Purpose: This is the ACCumulator register. Certain operations, such as adding immediates, can only be done to the accumulator register. This is necessary in order to accomodate all possible operations possible. | + | Purpose: [ACCumulator] Certain operations, such as adding immediates, can only be done to the accumulator register. This is necessary in order to accomodate all possible operations possible. |
| ---- | ---- | ||
| Register:$DMP\\ | Register:$DMP\\ | ||
| - | Purpose: This is the Data Memory Pointer. The user will only be able to access the address in the data memory indicated by the Data Memory Pointer. | + | Purpose: [Data Memory Pointer] The user will only be able to access the address in the data memory indicated by the Data Memory Pointer. |
| ---- | ---- | ||
| Register:$JP\\ | Register:$JP\\ | ||
| - | Purpose: This is the Jump Pointer. Whenever we need to jump to or branch to a specific point in the data memory, the program counter will change to the value located in $JP. | + | Purpose: [Jump Pointer] Whenever we need to jump to or branch to a specific point in the data memory, the program counter will change to the value located in $JP. |
| ---- | ---- | ||
| - | Register:\\ | + | Register: $Z\\ |
| - | Purpose: | + | Purpose:[Zero] This register is always set to 0. |
| ---- | ---- | ||
| Register: $G0\\ | Register: $G0\\ | ||
| Line 64: | Line 64: | ||
| Our CPU will be able to execute the following instructions. If you want to make a program, the following section will serve as the documentation required to create the program. | Our CPU will be able to execute the following instructions. If you want to make a program, the following section will serve as the documentation required to create the program. | ||
| + | ---- | ||
| + | Instruction: MOVA\\ | ||
| + | Format: | 000aaabb |\\ | ||
| + | Description: [MOVe values (extra A)] Move the value from register $b to $a. $a=$b. Notice that only 2 bits have been allocated for the $b register, even though there are 8 registers. $b registers may only select general registers. (00 selects $G0, 11 selects $G3) | ||
| + | ---- | ||
| + | Instruction: MOVB\\ | ||
| + | Format: | 001aabbb |\\ | ||
| + | Description: [MOVe values (extra B)] Move the value from register $b to $a. $a=$b. Notice that only 2 bits have been allocated for the $a register, even though there are 8 registers. $a registers may only select general registers. (00 selects $G0, 11 selects $G3) | ||
| + | ---- | ||
| + | Instruction:JE\\ | ||
| + | Format: | 010aaabb |\\ | ||
| + | Description: [Jump if Equal] Jump to a different location in the program if the equal condition is met. The program counter will be set to the value located in $JP when the value at register $a is the same as the value at register $b. Note that because there are 2 bits for b, $b will always be a general register. (00 selects $G0, 11 selects $G3). For an unconditional branch, set $a=$b. | ||
| + | ---- | ||
| + | Instruction:ADDR\\ | ||
| + | Format: | 011aaaxx |\\ | ||
| + | Description: [ADD Register] Add a register value to the accumulator. $ACC = $ACC + $a. | ||
| + | ---- | ||
| + | Instruction:ADD\\ | ||
| + | Format: | 100iiiis |\\ | ||
| + | Description: [ADD] Add an immediate value to the accumulator. If s=0, then $ACC=$ACC+0000iiii. If s=1, then $ACC=$ACC+iiii0000. | ||
| + | ---- | ||
| + | Instruction:RES\\ | ||
| + | Format: | 101xxxxx |\\ | ||
| + | Description: [RESet] Reset the accumulator to zero. $ACC = $Z. | ||
| + | ---- | ||
| + | Instruction: TW\\ | ||
| + | Format: | 110aaaxs |\\ | ||
| + | Description: [Transfer Word] If s = 0, store a byte from the register file to the data memory. The value in register $a will be stored to the address in the data memory indicated by $DMP. If s=1, load a byte from the data memory to the register file. The value stored in the address in the data memory indicated by $DMP will be stored to register $a. | ||
| + | ---- | ||
| + | === Final Schematic === | ||
| + | The following is the final overall schematic of our 8-bit CPU. | ||
| + | {{ :2014:circuitdiagram.jpg |}} | ||
| + | The following is a table depicting how the values of each flag is calculated | ||
| + | {{ :2014:8bitminecraftcputable2.jpg |}} | ||
| - | Instruction: SW\\ | + | ==== Building the World ==== |
| - | Format: | 000 | x | aaa | x |\\ | + | |
| - | Description: [Store word] Store a word from the register to the data memory. The \\ | + | |
| - | ---- | + | In order to build the world, we used a mod pack called Feed The Beast Ultimate. It contains many different mods which made this project possible. The main mod we used was called RedPower, which contains many different logic gates and other circuit components with which we could build our CPU with. We then used MCedit to copy and paste large chunks of repeatable blocks. The following videos show off our world and CPU, and help give a sense of how we built it. |
| + | |||
| + | [[http://youtu.be/k8AO30he_Dg|CompArch Project 8-Bit Minecraft CPU pt.1]]\\ | ||
| + | [[http://youtu.be/4YIL3sc24nk|CompArch Project 8-Bit Minecraft CPU pt.2]] | ||
| + | |||
| + | ===== Future Work ===== | ||
| + | |||
| + | We spend a lot of time on this, but there is still a lot of work that can be done on this. For this reason, we are releasing all of our documentation and our world. All instructions will be included in this [[https://drive.google.com/file/d/0Bw24Rv3qYoQdaHlaUVBwWU9jSWs/view?usp=sharing|zip file]]. The following improvements are to be made: | ||
| + | * Minimizing glitches | ||
| + | * Optimizing speed | ||
| + | * Optimizing space | ||
| + | * Expanding CPU Size | ||
| + | * Automated Loading of Instruction Memory. | ||
| + | Please enjoy! | ||
2014/8-bit_minecraft_cpu.1418796555.txt.gz · Last modified: 2014/12/17 01:09 by siddthesquid
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