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2014:fpga_piano_lfsr_with_sine_wave_generator

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Piano and Chip Tunes with an LFSR on an FPGA

by Casey Alvarado, Mika Ichiki-Welches, Cynthia Chen, Nitya Dhanushkodi and Zoher Ghadyalli

What did we do?

We made cool sounds with a Field Programmable Gate Array (FPGA)!!! We made a piano with the octave frequencies starting at middle C going to the octave above middle C with the following frequencies.

Piano on an FPGA

We built a piano on an FPGA by outputting frequencies corresponding to the musical notes of a piano. For example, the note A is at 440 Hz. We created an up counter that divided the frequency of a 25 MHz clock by how many times a wave has to wait to oscillate at the desired musical note frequency. We divided the clock by how many times it takes to get the correct frequency of 440 Hz, and assigned each note's frequency to the GPIO pins (input/output pins of the FPGA). We then just jumped these pins to a breadboard and connected this frequency output to a speaker.

We enabled each note frequency using the switches on the FPGA as enables in the top level module that the FPGA synthesizes. You can enable as many switches at once and play notes or chords.

Chip Tunes using an LFSR on an FPGA

An LFSR is a linear-feedback shift register whose input bit is a linear function of its previous state.

The most commonly used linear function of single bits is exclusive-or (XOR). Thus, an LFSR is most often a shift register whose input bit is driven by the XOR of some bits of the overall shift register value.

The initial value of the LFSR is called the seed, and because the operation of the register is deterministic, the stream of values produced by the register is completely determined by its current (or previous) state. Likewise, because the register has a finite number of possible states, it must eventually enter a repeating cycle. However, an LFSR with a well-chosen feedback function can produce a sequence of bits which appears random and which has a very long cycle.

We used…

Playing a Programmed Song with the Press of a Button

hot damn

Why did we do it?

Because lolz

this part should be a paragraph long

How did we do it?

This portion can assume an audience that has taken Computer Architecture, but don’t get burdened by buzzwords. A sure sign of a bad engineer is over reliance on acroynms.

The first thing we needed to do was slow down the clock. We ran the clock through an Up Counter so that the flip flops would wait for so we used an upcounter to divide the clock appropriately to the correct signal at 440 Hz.

Run the piano/song/LFSR

You can synthesize either the piano/song mode on the FPGA or the LFSR chip tunes on the FPGA.

2014/fpga_piano_lfsr_with_sine_wave_generator.1418828010.txt.gz · Last modified: 2014/12/17 09:53 by teamuptownfunk