Made by: Mason del Rosario, Evan Dorsky, Rahil Dedhia, Jamie Gorson, Jack Fan

For our final project, we decided to program an FPGA to play simple music. We attempted to implement two different kinds of modes: a free-play mode where the user was able to play a combination of seven different notes in a major scale and a song mode where a predetermined song would play. In order to produce different notes, we divided the FPGA's clock by different values which yielded the various notes we wanted. We opted to use seven separate GPIO pins on the FPGA to produce notes, and we were able to play all the notes using a single speaker by building a simple analog signal adder.

For our final project, we built simple keyboard using an FPGA. A user can turn on multiple notes at the same time using seven of the switches on the FPGA

Throughout the semester, we have been working in Verilog, and wanted to see how this could be applied by programming an FPGA. We all like music and thought it would be cool to use user input to an FPGA to play chords and songs. In addition, we knew that we could generate signals for notes by dividing the clock of the FPGA, and this gave us an opportunity to have a relatively nicely scoped project. We were able to get code that played a single note fairly quickly, and were able to focus more efforts to learning about an FPGA. \linebreak

There is a great deal that can be done with playing music, and with this project we could build our way up so we can have something working on every iteration. That way, we could continue adding new functionality to our project without worrying about not having something cool to show. Overall, making an FPGA piano gave us the opportunity to have a very well scoped project that would allow us to learn a lot about how an FPGA works.

This portion can assume an audience that has taken Computer Architecture, but don’t get burdened by buzzwords. A sure sign of a bad engineer is over reliance on acroynms.

Include everything necessary to pick up where you left off. This should include:

• Code
• Schematics
• build instructions
• A list of difficulties and ‘gotchas’ while doing this project
• Work Plan reflection
• A possible TODO to extend the depth of the project

1. Download Xilinx ISE design tools at http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html.

2. Clone github repo: https://github.com/mdelrosa/cafinalproject

3. Create a new project in Xilinx (follow instructions from http://tinyurl.com/ca-fpga-13; these next steps outline the process described in the tutorial)

4. Add piano.v as a source

5. Right click on piano.v, click on add source, and add piano.ucf

6. Click on the Green arrow that says “Implement Top Module”; this should synthesize your top level module and implement the design constraints set by the ucf file

7. Double click on “Configure Target Device”

In order to have all of our GPIO pins play their notes through the same speaker, we needed to construct a circuit that added the signals together. To accomplish this, we created a simple analog signal-adding circuit. This circuit uses an inverting amplifier to amplify the summed signal.

The seven GPIO pins which generate the notes' frequencies are each attached to a 1kΩ resistor. These seven resistors are all attached to the noninverting input of the op amp. Note that the op amp pictured is not the one which we opted to use; while we used a TL081, it is fine to use most any op amp.

This should all be in zip file(s) on your wiki page.