| Date | File | Material |
|---|---|---|
| 9/5/13 | 0_-_zero_day.pptx | Intro to Boolean Logic, Course Details |
| 9/9/13 | 1_-_boolean_logic.pptx | More Boolean Logic, Karnaugh Maps and DeMorgan's Laws |
| 9/12/13 | 2_-_number_systems.pptx | Number Systems, Base R, Negative Numbers, Fixed Point |
| 9/16/13 | 3_-_floating_point.pptx | Fixed Point Multiply, Floating Point |
| 9/19/13 | 4_-_timing_and_latches.pptx | Propagation Delay, Latches, Flip Flops |
| 9/23/13 | 5_-_fabric_and_verilog.pptx | (De)Muxes, LUTs, FPGAs, Shifting |
| 9/26/13 | 6_-_performance.pptx | Performance, Ahmdahl's Law, Benchmarking |
| 9/29/13 | 7_-_alu_and_growth.pptx | Parameterized Growth, ALUs |
| 10/3/13 | 8_-_single_cycle_cpu.pptx | Our First CPU |
| 10/7/13 | 9_-_branching_and_machine_code.pptx | Our First CPU, Continued |
| 10/10/13 | 10_-_mips_assembly.pptx | MIPS Assembly |
| 10/17/13 | 11_-_test_day.pptx | Test Day |
| 10/21/13 | 12_-_call_me_maybe.pptx | Calling Conventions |
| 10/24/13 | 13_-_call_of_duty.pptx | Recursion, MIPS specific calling convention |
| 10/28/13 | 14_-_behavioral_verilog.pptx | Behavioral Verilog |
| 10/31/13 | 15_-_multicycle_cpu.pptx | Multicycle CPUs |
| 11/4/13 | 16_-_timing_control.pptx | Control and Timing of Multicycle CPUS 16_-_timing_control_-_example_hrts.xlsx |
| 11/7/13 | 17_-_pipelining.pptx | Pipelining |
| 11/11/13 | 18_-_hazards.pptx | The Hazards of Pipelining |
| 11/14/13 | 19_-_cool_math_stuff.pptx | NewtonRaphson and CORDIC |
| 11/18/13 | 20_-_caching.pptx | Caching |
| 12/2/13 | 21_-_retrospective.pptx | Retrospective |